It is usually known to use devices to actively correct the power factor (PFC) for switching power supplies used in electronic equipments in common use as computers, televisions, monitors, etc. and for supplying fluorescent lamps, that is switching pre-regulator stages that must absorb from the external network a current that is almost sinusoidal and in phase with the network voltage. Therefore a switching power supply of the actual type comprises a PFC and a DC—DC converter connected with the output of the PFC.
A switching power supply of the conventional type comprises a DC—DC converter and an input stage connected with the electric network and constituted by a full wave rectifier diode bridge and by a capacitor connected immediately downstream for producing a non-regulated continuous voltage that is derived from the alternated sinusoidal network voltage. The capacitor has a capacitance great enough that a relative low undulation with respect to the continuous level is present at its terminals. The rectifier diodes of the bridge also will conduct only for a small portion of each half cycle of the network voltage because the instantaneous value thereof is lower than the voltage at the terminals of the capacitor for the greatest part of the cycle. Consequently the current absorbed from the network will be constituted by a series of narrow pulses the amplitude of which is 5–10 times the resulting average value.
This presents considerable consequences: the current absorbed from the network has peak values and effective values which are much higher than those in the case of absorbing sinusoidal current, the network voltage is distorted due to the almost simultaneous pulse absorption of all the users connected with the network, in the case of three-phase systems the current in the neutral conductor is increased and a low use of the power potentialities of the electric power systems occurs. In fact, the pulse current waveform has many odd harmonics which, even if they do not contribute to the power supplied to the load, contribute to increase the effective current absorbed from the network and also to increase the power dissipation.
Quantitatively this can be expressed both as Power Factor (PF), that is the ratio between the real power (that supplied to the load by the power supply which is added to the power dissipated internally as heat and the apparent power (the product of the network effective power by the absorbed effective power), and as Total Harmonic Distortion (THD), which usually is the percent ratio between the energy associated with all the superior level harmonics and that associated with the main harmonic. Usually a power supply provided with a capacitive filter has a PF comprised between 0.4 and 0.6 and a THD higher than 100%.
A PFC, placed between the rectifier bridge and the input of the DC—DC converter, allows there to be absorbed from the network a current which is almost sinusoidal and in phase with the voltage, by making the PF near 1 and by reducing the THD.
In FIG. 1 a pre-regulator PFC stage is schematically shown comprising a boost converter 20 and a control device 1, in this case the control device L6561 produced by STMicroelectronics S.p.A. The boost converter 20 comprises a full wave diode rectifier bridge 2 having in input a network voltage Vin, a capacitor C1 (which serves as filter for the high frequency) having one terminal connected with the diode bridge 2 and the other terminal connected to ground, an inductor L connected with a terminal of the capacitor C1, a MOS power transistor M having the drain terminal connected with a terminal of the inductor L downstream of the last one and which has the source terminal connected with a resistor Rs connected to ground, a diode D having the anode connected with the common terminal of the inductor L and of the transistor M and the cathode connected with a capacitor Co having the other terminal connected to ground. The boost converter 20 generates an output direct voltage Vout at the terminals of the capacitor Co which is higher than the highest peak of the network voltage, typically 400V for systems supplied by a European network or by means of a universal supply. Such voltage Vout will be the input voltage of the DC—DC converter connected with the PFC.
The control device 1 must keep the output voltage Vout at a constant value by means of a feedback, control action. The control device 1 comprises an error operational amplifier 3 adapted to compare a part of the output voltage Vout, which is the voltage Vr given by Vr=R2*Vout/(R2+R1) (wherein the resistors R1 and R2 are connected in series with each other and are connected in parallel with the capacitor Co) with a voltage reference Vref, for example of the value of 2.5V, and it generates an error signal proportional to the difference thereof. The output voltage Vout presents an undulation at a frequency that is twice the network frequency and which is superimposed on the continuous value. However if the bandwidth of the error amplifier is considerably reduced (typically it is lower than 20 Hz) by means of a suitable compensation network comprising at least one capacitor and if operation in an almost stationary regime is assumed, that is if the input effective voltage and the load are constant, such undulation will be considerably reduced and the error signal will become constant.
The error signal Se is sent to a multiplier 4 wherein it is multiplied by a signal Vi that is a part of the network voltage rectified by the diode bridge 2. At the output of the multiplier 4 a signal Sm will occur which is given by a rectified sinusoid, the width of which will depend certainly on the network effective voltage and on the error signal Se.
The signal Sm is sent to the non-inverting input of a PWM comparator 5 while at the inverting input the signal Srs is applied, which signal occurs on the resistance Rs. If the signals Srs and Sm are equal the comparator 5 sends a signal to the control block 6 that is adapted to drive the transistor M and which, in this case, turns it off. In such a way the output signal Sm of the multiplier determines the peak current of the transistor M and it will be enveloped by a rectified sinusoid. A filter placed at the input of the stage eliminates the component at the commutation frequency and provides the current absorbed from the network the shape of the sinusoidal envelope. The block 6 comprises a block 7 adapted to detect the current zeros and able to send a pulse signal to an OR gate 8, the other input terminal of which is connected with a starter 10, which is adapted to send a signal to the OR gate 8 at the start time instant; the output signal S of the OR gate 8 is the set input of the set-reset flip-flop 11 which has another input R that is the output signal of the device 5, and which has an output signal Q. The signal Q is sent to the input of a driver 12 which controls the turning on and off of the transistor M.
The error amplifier 3 may be formed in two different ways: as a voltage amplifier, wherein the output voltage is proportional to the difference between the voltages at the input terminals, or as a transconductance amplifier, the output current of which is proportional to the difference between the voltages that are present at the input terminals. The use of the voltage amplifier as error amplifier is preferable for higher noise immunity thereof as in the aforementioned device L6561.
Since it is necessary to modify the transfer function of the loop gain for all the closed loop feedback control systems in order to assure the stability of the same loop and to provide for a satisfactory dynamic operation, in the case of the PFCs this is performed usually by modifying the frequency response of the error amplifier. By using a voltage amplifier as error amplifier, the compensation network comprises at least one capacitor C connected in feedback between the output and the inverting input of the amplifier 3.
One among the possible faults for a switching power supply provided with a PFC is the opening of the voltage control loop.
The more usual cause is due to the breaking of the resistor R1 of the output divider which is connected to the high voltage: in such case the system loses the information of the output voltage and the resistor R2 is inclined to bring the input of the error amplifier to ground. In such way the output is unbalanced towards the top and therefore the turning on of the transistor M is controlled for the maximum possible duration. Consequently the output voltage will increase without control bringing the load supplied by the PFC and the same PFC to destruction.
By using the error amplifier 3, the presence of the compensation network with the capacitor C connected between the output and the inverting input determines that the latter has the same potential of the other input for the whole period wherein the current may flow through the capacitor C, that is until the output of the error amplifier 3 has the possibility of increasing. When the output arrives at the top end of its dynamic or, as it is called, the error amplifier 3 is saturated high, the current does not flow through the capacitor and the inverting input may go to ground.
In commerce there are integrated PFCs having a protection against the opening of the voltage control loop. The solution in such PFCs consists of adding a further resistive divider (constituted by the resistors R1a and R2a which are connected in series with each other) connected with the output of the PFC which allows to read the voltage and to use a further comparator 28 having the non-inverting input connected with a reference voltage Vth1. When the resistor R1a is opened, the voltage at the inverting input of the comparator 28 overcomes the voltage Vth1 and the output 29 of the comparator 28 will provide to turn off the transistor M.
This solution has the disadvantage to require either external components (a comparator and a reference voltage generator with respective passive components besides the resistor divider) or, in the case of integrated formation, an added pin dedicated to this function which is in the control device 1 of the PFC. In the last case it is possible to incur to a lack of available pins, thereby resulting impossible to integrate this function.